A phase-locked loop is a circuit that generates an output signal having a phase related to a phase of an input signal. The output signal can have a frequency that is a multiple of a frequency of the input signal. Phase-locked loops can be used in a variety of applications, such as frequency synthesizers, clock recovery circuits, radio receivers, radio transmitters, test equipment, other radio frequency systems, and the like.
A fractional-N phase-locked loop is a type of phase-locked loop that implements a division ratio in a feedback path of the phase-locked loop, in which the division ratio has an integer part and a fractional part. A modulator, such as a delta sigma modulator, can switch an integer division ratio of an integer divider in the feedback path of the fractional-N phase-locked loop. This can implement the division ratio with the integer part and the fractional part for the feedback path of the fractional-N phase-locked loop.
The modulator can introduce quantization noise into the fractional-N phase locked loop. There is a desire to suppress the quantization noise. However, suppressing quantization noise from the modulator can involve engineering tradeoffs with having a relatively wide bandwidth for the fractional-N phase-locked loop.